Every FPGA vendor describes their parts a little differently – Xilinx counts “logic cells,” Altera counts “logic elements,” Lattice counts LUTs – and there’s surprisingly no single place that lays the families side by side. So I built one. This is a cross-vendor reference to the current, in-production FPGA families from the major vendors: where each one sits by size, generation, lifecycle status, and rough price.
Sort any column, or filter by vendor, device type, or lifecycle.
Logic-size units differ across vendors and are not directly comparable. Prices are approximate / indicative. Last updated: June 2026.
| Vendor | Family | Type | Process | Logic size | SoC | Intro | Lifecycle | Successor | Price |
|---|---|---|---|---|---|---|---|---|---|
| Achronix | Speedster7t | FPGA | 7nm | 326K-692K LUTs | – | 2019 | Active (inferred) | – | N/A |
| AMD/Xilinx | Artix-7 | FPGA | 28nm | 12K-215K logic cells | – | 2010 | Active | Artix UltraScale+ | $30–$350 |
| AMD/Xilinx | Kintex-7 | FPGA | 28nm | 65K-478K logic cells | – | 2010 | Active | Kintex UltraScale+ | $250–$2,000 |
| AMD/Xilinx | Virtex-7 | FPGA | 28nm | 583K-1.95M logic cells | – | 2010 | Active | Virtex UltraScale | ~$9,000 |
| AMD/Xilinx | Zynq-7000 | FPGA | 28nm | 23K-444K logic cells | Arm Cortex-A9 | 2011 | Active | Zynq UltraScale+ MPSoC | $60–$4,000 |
| AMD/Xilinx | Kintex UltraScale | FPGA | 20nm | 318K-1.45M logic cells | – | 2013 | Active | Kintex UltraScale+ | $3,000–$6,000 |
| AMD/Xilinx | Virtex UltraScale | FPGA | 20nm | 783K-5.54M logic cells | – | 2013 | Active | Virtex UltraScale+ | $14,000–$19,000 |
| AMD/Xilinx | Kintex UltraScale+ | FPGA | 16nm | 356K-1.84M logic cells | – | 2015 | Active | – | $3,000–$10,000 |
| AMD/Xilinx | Spartan-7 | FPGA | 28nm | 6K-102K logic cells | – | 2015 | Active | Spartan UltraScale+ | $20–$160 |
| AMD/Xilinx | Virtex UltraScale+ | FPGA | 16nm | 862K-8.94M logic cells | – | 2015 | Active | – | $20,000–$85,000 |
| AMD/Xilinx | Zynq UltraScale+ MPSoC | FPGA | 16nm | 103K-1.14M logic cells | Arm Cortex-A53 | 2015 | Active | Versal | $400–$7,000 |
| AMD/Xilinx | Zynq UltraScale+ RFSoC | FPGA | 16nm | 489K-930K logic cells | Arm Cortex-A53 | 2017 | Active | Versal RF Series | $20,000–$40,000 |
| AMD/Xilinx | Versal AI Core | FPGA | 7nm | 540K-1.97M logic cells | Arm Cortex-A72 | 2019 | Active | – | $25,000–$45,000 |
| AMD/Xilinx | Versal Prime | FPGA | 7nm | 329K-2.2M logic cells | Arm Cortex-A72 | 2019 | Active | Versal Prime Gen 2 | $2,500–$13,000 |
| AMD/Xilinx | Versal Premium | FPGA | 7nm | 833K-18.5M logic cells | Arm Cortex-A72 | 2020 | Active | Versal Premium Gen 2 | $12,000–$40,000 |
| AMD/Xilinx | Artix UltraScale+ | FPGA | 16nm | 96K-308K logic cells | – | 2021 | Active | – | $170–$450 |
| AMD/Xilinx | Versal AI Edge | FPGA | 7nm | 44K-1.1M logic cells | Arm Cortex-A72 | 2021 | Active | Versal AI Edge Gen 2 | $4,000–$40,000 |
| AMD/Xilinx | Versal HBM | FPGA | 7nm | 3.8M-5.6M logic cells | Arm Cortex-A72 | 2021 | NRND | – | ~$40,000 |
| AMD/Xilinx | Spartan UltraScale+ | FPGA | 16nm | 11K-218K logic cells | – | 2024 | Active | – | $30–$70 |
| AMD/Xilinx | Versal RF | FPGA | 7nm | 1.2M-2.5M logic cells | Arm Cortex-A72 | 2024 | Active | – | N/A |
| Cologne Chip | GateMate | FPGA | 28nm | 20.5K CPEs | – | ~2021 | Active | – | ~$25 |
| Efinix | Trion | FPGA | 40nm | 3.9K-112K LEs | – | 2018 | Active | Titanium | $5–$60 |
| Efinix | Titanium | FPGA | 16nm | 36.2K-1.97M LEs | RISC-V (some variants) | 2020 | Active | – | $50–$300 |
| Efinix | Topaz | FPGA | 16nm | 52.2K-326K LEs | RISC-V (some variants) | 2024 | Active | – | N/A |
| Gowin | LittleBee (GW1N) | FPGA | 55nm | 1.6K-8.6K LUTs | Arm Cortex-M3 (some variants) | 2017 | Active | – | $1–$6 |
| Gowin | Arora (GW2A) | FPGA | 55nm | 20.7K-54.7K LUTs | – | 2018 | Active | – | $10–$18 |
| Gowin | Arora V (GW5A) | FPGA | 22nm | 15K-138K LUTs | Arm Cortex-M4 (some variants) | 2022 | Active | – | N/A |
| Intel/Altera | Cyclone IV | FPGA | 60nm | 6K-150K LEs | – | 2009 | Active (inferred) | Cyclone V | $18–$400 |
| Intel/Altera | MAX V | CPLD | 180nm | 40-2210 LEs | – | 2010 | Active (inferred) | MAX 10 | $6–$40 |
| Intel/Altera | Stratix V | FPGA | 28nm | 89K-359K ALMs | – | 2010 | Active (inferred) | Stratix 10 | N/A |
| Intel/Altera | Arria V | FPGA | 28nm | 75K-504K LEs | Arm Cortex-A9 | 2011 | Active (inferred) | Arria 10 | N/A |
| Intel/Altera | Cyclone V | FPGA | 28nm | 25K-301K LEs | Arm Cortex-A9 | 2011 | Active | Cyclone 10 | $50–$400 |
| Intel/Altera | Arria 10 | FPGA | 20nm | 160K-1.15M LEs | Arm Cortex-A9 | 2013 | Active (inferred) | Agilex 5 | N/A |
| Intel/Altera | MAX 10 | FPGA | 55nm | 2K-50K LEs | – | 2014 | Active | – | $10–$250 |
| Intel/Altera | Stratix 10 | FPGA | 14nm | 378K-10.2M LEs | Arm Cortex-A53 | 2015 | Active (inferred) | Agilex 7 | N/A |
| Intel/Altera | Cyclone 10 | FPGA | 20nm | 16K-220K LEs | – | 2017 | Active (inferred) | Agilex 3 | $10–$170 |
| Intel/Altera | Agilex 7 | FPGA | 10nm | 573K-4M LEs | Arm Cortex-A53 | 2019 | Active | – | N/A |
| Intel/Altera | Agilex 5 | FPGA | Intel 7 | 50K-656K LEs | Arm Cortex-A76/A55 | 2022 | Active | – | N/A |
| Intel/Altera | Agilex 9 | FPGA | 10nm | 1.44M-2.75M LEs | Arm Cortex-A53 | 2022 | Active (inferred) | – | N/A |
| Intel/Altera | Agilex 3 | FPGA | Intel 7 | 25K-135K LEs | Arm Cortex-A55 | 2024 | Active | – | N/A |
| Lattice | MachXO2 | FPGA | 65nm | 256-6864 LUTs | – | 2010 | Active | MachXO3 | $6–$40 |
| Lattice | iCE40 | FPGA | 40nm | 384-7680 LUTs | – | 2012 | Active | – | $3–$25 |
| Lattice | MachXO3 | FPGA | 40nm | 640-9400 LUTs | – | 2013 | Active | MachXO5-NX | $4–$30 |
| Lattice | ECP5 | FPGA | 40nm | 12K-85K LUTs | – | 2014 | Active | CertusPro-NX | $30–$140 |
| Lattice | CrossLink-NX | FPGA | 28nm | 14K-32K LUTs | – | 2019 | Active | – | $18–$80 |
| Lattice | Certus-NX | FPGA | 28nm | 7.5K-32K LUTs | – | 2020 | Active | – | $35–$100 |
| Lattice | Mach-NX | FPGA | 28nm | 7K LUTs | – | 2020 | Active | – | ~$90 |
| Lattice | CertusPro-NX | FPGA | 28nm | 43K-80K LUTs | – | 2021 | Active | – | $80–$150 |
| Lattice | Avant | FPGA | 16nm | 196K-637K LUTs | – | 2022 | Active | – | $650–$1,500 |
| Lattice | MachXO5-NX | FPGA | 28nm | 22K-80K LUTs | – | 2022 | Active | – | $70–$170 |
| Microchip | IGLOO2 | FPGA | 65nm | 5K-150K LEs | – | 2013 | Active | – | $18–$140 |
| Microchip | SmartFusion2 | FPGA | 65nm | 5K-150K LEs | Arm Cortex-M3 | 2013 | Active | – | $40–$550 |
| Microchip | PolarFire | FPGA | 28nm | 48K-481K LEs | – | 2017 | Active | – | $140–$1,000 |
| Microchip | PolarFire SoC | FPGA | 28nm | 23K-461K LEs | RISC-V | 2019 | Active | – | $50–$450 |
| Microchip | RT PolarFire | FPGA | 28nm | 481K LEs | – | 2019 | Active | – | N/A |
| QuickLogic | EOS S3 | FPGA | 40nm | 2.4K logic cells | Arm Cortex-M4 | 2016 | Active | – | ~$7 |
Notes & Limitations
- Logic size isn’t comparable across vendors. Each uses its own unit – logic cells, LEs, LUTs, ALMs, CPEs. Read the numbers as rough magnitude, and compare within a vendor, not across.
- Prices are approximate and indicative. They’re representative single-unit (qty 1) figures from distributor listings (mostly DigiKey), current as of the “last updated” date shown above the table, rounded for readability – meant to show how families are positioned, not to quote a purchase. High-end, rad-tolerant, and brand-new parts often have no public price (“N/A”). Prices drift; treat this as a snapshot.
- Scope: current mainstream families only. This is the in-production lineup from active vendors with Western distribution. Historical/EOL families (older Spartan/Cyclone lines, CPLDs, antifuse) and emerging/Chinese/IP-only vendors aren’t here yet – they’re planned as later additions.
- “Family” means one marketed series. Umbrella lines are split (Versal AI Core / Prime / Premium are separate rows). Size and price ranges span the smallest to largest device in each family.
- Intro year is the announced year, even where a part shipped a year or two later. “Active (inferred)” means a family is still listed and stocked but I couldn’t confirm a formal lifecycle status.
I aim to refresh this periodically and re-check prices and lifecycle when I do – the “last updated” date above the table tells you how current it is. FPGA lineups move constantly: vendors add families, rename them, and quietly retire others. If you spot something wrong, stale, or missing, please leave a comment to let me know and I’ll check it when I next update. Still on the to-do list: a historical/EOL tier and an emerging-vendor tier.
Leave a Reply